Timestamp Resolution and Timeout Behavior for PXI‑6683H

Issue Details

I am using a PXI‑6683H and have questions about the behavior of the niSync Read Trigger Time Stamp VI. Specifically, I need to understand the returned timestamp resolution, the supported range and resolution of the Timeout input, and whether a timeout condition affects the ability to capture or retrieve subsequent timestamps.

Solution

The behavior of the niSync Read Trigger Time Stamp VI on the PXI‑6683H is defined by the underlying hardware clock and driver implementation.

• Understanding timestamp resolution
  • The timestamp resolution is 10 ns.
  • This resolution is determined by the hardware clock attribute NISYNC_ATTR_1588_CLK_RESOLUTION, which is 10 ns on NI hardware.
• Timeout input range
  • The minimum supported value is 0 s, which performs a non‑blocking read.
  • The maximum supported value is 2,147,483.647 s, derived from the maximum 32‑bit signed integer value when expressed in milliseconds.
  • The default Timeout value is 10 s.
• Timeout resolution
  • The driver supports millisecond resoulution for the Timeout input.
  • The timeout value is internally converted to milliseconds and cast to a 32‑bit integer.
  • Any fractional milliseconds are discarded due to integer truncation.
    • For example, 1.7 ms becomes 1 ms.
    • For example, 0.9 ms becomes 0 ms.
• Timeout behavior during timestamp reads
  • When a timeout occurs, there is no blocking, cooldown, or recovery period.
  • A timeout only indicates that no new timestamps were received during the specified wait period.
  • Timestamp captures and buffering continues to operate independently of the read operation.
  • Subsequent calls to niSync Read Trigger Time Stamp VI can be made immediately without delay.