Synchronize an Analog Voltage Signal With a Counter Input on a cDAQ

Updated Jun 30, 2026

Environment

Hardware

  • cDAQ-9174

Software

  • LabVIEW
  • DAQmx Steps

Overview:

To achieve proper synchronization, a common clock source must be selected. While the Time Synchronization guide typically mentions only one shared clock, it is important to understand that both tasks must explicitly reference the same timing source to ensure they start together.

 

If your hardware module supports PFIO (Programmable Function Input/Output) ports, these can be particularly useful. PFIO ports allow for precise timing and triggering between tasks, making it easier to coordinate the start of Counter and Analog Input operations. By configuring one task to trigger the other via a PFIO signal, you can achieve tight synchronization even across different subsystem types.

Environment: LabVIEW 2021 or later, NI DAQmx 202 or later NI cDAQ chassis.

Steps:

  1. Select a common clock source that both tasks can reference for timing. Use the DAQmx Create Virtual Channel VI and a Property Node to configure the clock source on the shared PFIO line (for example, /cDAQ1Mod1/PFI0).

Figure 1. Example code for the clock source configuration.

 

  1. Configure the Analog Input task with DAQmx Timing to use the chosen clock. Set the sample mode to Continuous Samples, specify the sample rate, and use the DAQmx Trigger VI to set the Start Trigger source to the common PFIO line (for example, /cDAQ1Mod1/PFI0). In this example, cDAQ1Mod1/PFI0 and cDAQ1Mod2/PFI0 are physically connected externally.

Figure 2. Selecting the Start Trigger as the common trigger for the Analog Input task.

 

  1. Configure the Counter Input task with DAQmx Timing to use the same chosen clock. This step differs from the Analog Input configuration. Instead of using the DAQmx Trigger VI, use a Property Node to set the Arm Start Trigger source and the Start Digital Edge source to the PFIO line. This is necessary because Counter tasks require explicit arming before they respond to the shared start trigger.

Figure 3. Configuring the Counter Input task with Property Nodes for arm start and digital edge triggering.

 

  1. Start both tasks. Start the Counter Input task first, then start the Analog Input task. The Counter task arms and waits for the trigger, and the Analog Input task issues the start trigger on the shared PFIO line, causing both to begin acquisition simultaneously.
  2. Read data from both tasks and verify that the timestamps and sample counts align, confirming synchronized acquisition.

    Result:

    Both the Analog Input and Counter Input tasks start simultaneously using the shared PFIO trigger. The acquired data from both channels is time aligned.

    Next Steps

    If you observe a consistent offset between the two signals, verify that the physical PFIO wiring is correct and that both modules reference the same chassis timebase. For more complex setups involving additional task types, refer to the NI DAQmx Time Synchronization guide.