Compilation Errors When Using VHDL Code in an IP Integration Node

Issue Details

I'm currently using VHDL code within an IP Integration Node in my LabVIEW project, but I'm encountering errors during the compilation stage. The code had been functioning correctly before, but after making some changes, it now fails to compile. Specifically, during the compilation process, I click "Next," then "Generate," but the process halts unexpectedly at that point.

Solution

When using VHDL code in an IP Integration Node, please make sure to follow these guidelines:

• The IP Integration Node and CLIP only support VHDL code written in VHDL-93 or VHDL-2002 syntax.
  • VHDL-2008 syntax is not supported 

• CLIP does not support custom user libraries in the VHDL. If your VHDL uses custom user libraries, you have the following workarounds:

  • Create a netlist from the VHDL and integrate the netlist using CLIP.
  • Reference the default reference library instead of a custom user library.
• Synthesize your existing code into a netlist that can then be loaded into LabVIEW FPGA.
  • Please be sure to use the same compiler used by the LabVIEW Compilation Tool
• Isolate new functions
  • Create a copy of your code and remove the newly added functions and reintroduce them one by one to identify which one could be causing an issue.
• Monitor FPGA resources
  • During each test, check the FPGA resource usage to rule out any resource-related problems.