Solution
The issue was resolved by applying a known patch for Xilinx ISE 14.7 or Vivado. The file xilinx-ise-win10-hang-hotfix.zip, although originally named for Windows 10, has been verified to work on both Windows 10 and Windows 11 systems.
Download the xilinx-ise-win10-hang-hotfix.zip attached in this page, then replace libPortability.dll file in the following directories with the file in the zip:
ISE
C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64\libPortability.dllC:\Xilinx\14.7\ISE_DS\common\lib\nt64\libPortability.dll
Vivado
C:\NIFPGA\programs\Vivado[version]\ids_lite\ISE\lib\nt64\libPortability.dll
Following the replacement, the PC was restarted to ensure the new libraries were loaded. This successfully resolved the synthesis hang issue, and the FPGA compilation completed without further problems.