Voltage Ranges of the PXIe-7890 Low Latency Analog Outputs

Issue Details

In the PXIe-7890 specifications document, there is a foot note related to the output voltage range of the low-latency analog outputs. It states, "The PXIe-7890 supports 0.5 V range only on Ch<0...7>". Yet, it is not clear if that means that the Channels 0 to 7 only support the 0.5 V range, or if Channels 0 to 7 support both 10 V and 0.5 V range. Do they support both voltage ranges or only one?

Solution

The PXIe-7890 is an FPGA multifunction board that features a unique combination of ports for hardware-in-the-loop (HIL) applications. The ports include analog inputs, analog outputs, low-latency analog outputs, digital inputs, digital outputs, and  multi-gigabit transceivers. 

The device supports the ± 10 V range for the common analog outputs located in connector 1. However, the low-latency analog outputs located in connector 3 support both the ± 10 V and ± 0.5 V ranges. Channels 0 to 7 support both voltage ranges, while channels 8 to 15 only support the ± 10 V range.