How Do I Use the PXI Chassis’s Internal 10MHz Clock for a Timed Loop?

Updated Jul 30, 2024

Reported In

Hardware

  • Multifunction I/O Device

Software

  • LabVIEW

Driver

  • NI-DAQmx

Issue Details

I would like to synchronize my timed loop to the 10MHz clock of my PXI chassis. How can I do that?

Solution

This method requires an NI PXI module with a built-in counter. Most PXI multifunction I/O modules have at least one counter that can be used for this purpose.

Using the DAQmx Create Timing Source VI, we can create a new timing source for a Timed Loop.
A LabVIEW snippet is provided below:
Daqmx.png
 

Additional Information

Running the Timed Loop at the maximum frequency of the internal PXI clock (10MHz) is likely to cause issues, resulting in the Timed Loop frequently running late.
For applications that require higher frequencies, consider using our NI R Series, which features built-in FPGAs capable of operating at much higher frequencies.

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