Error: The method(s) are used in multiple clock domains

Updated Feb 20, 2024

Reported In

Software

  • LabVIEW FPGA Module

Issue Details

When trying to generate the intermediate files of my LabVIEW FPGA code I get the code generation error: 
The method(s) are used in multiple clock domains.
Details:
Object(s) are requesting access to a resource through method(s) in more than one clock domain.
Ensure that all objects requesting access to the corresponding method are in the same clock domain.

Error message.jpg

Solution

As shown in the image below, this error is caused by trying to access the same method using different clock domains. In this case, the code is trying to access Mod1/DIO0 using an FPGA I/O Node from the default 40 MHz Onboard Clock (from the cRIO-9098 being used), and the derived 80 MHz clock:

Block Diagram.jpg
To solve this you need to make sure all the calls to the same method are being made from the same clock domain. In the example shown, assuming you need to use the 80MHz derived clock, then you need to change the first two calls to Mod1/DIO0 to use the same clock domain using a Timed Loop:

Fixed_block_diagram.jpg
This will clear the error message when trying to generate the intermediate files. 

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