What Slow Background Conversion Mode for DAQ Does in VeriStand?

Issue Details

I have found an option with the name Slow Background Conversion Mode when setting up my Analog Input DAQ module in VeriStand, as shown in the image below. I would like to understand what this mode does.

  

 

Solution

VeriStand tries to acquire data from all DAQmx devices using Hardware-Timed Single Point Sample Mode at the same rate. For some cards, like the PXIe-433x, which are limited to slow sample rates, this is inappropriate as they would prevent other hardware from being used at a faster rate (for example, a PXIe-63xx X-series card acquiring at 10 kHz).

When the Slow Background Conversion Mode is enabled, the hardware is still limited to sampling at a slow rate, but the software reads do not block (they return the latest value immediately), and the actual conversions are performed in the background.

For example, if we acquire thermocouple data from a PXIe-4353 at 100 Hz for 1 second. The waveform data will look as shown in the image below.



When Slow Background Conversion Mode, we would be able to sample the data at 1 kHz instead. In this case, the data would look as illustrated below, where we should notice here that each sample is repeated 10 times since the hardware is still only acquiring at 100 Hz.

Additional Information

Slow Background Conversion Mode affects warmup iterations since they are counted in number of reads, not number of samples. Warmup iterations will be used quickly by reading as fast as possible and getting repeated data. On the other hand, disabling the mode will only affect an application if the modules can't acquire at least at the Primary Control Loops's rate.