Solution
All
NI C Series Digital Modules that are compatible with TTL will define a Voltage Low and Voltage High threshold for the digital inputs and outputs. Most TTL devices do not consist of a hysteresis, meaning that a digital signal that falls between the voltage thresholds in the datasheet is undefined. Logic gate manufacturers do not guarantee how the TTL gate will respond when a digital signal falls within the undefined range.
For example, the
NI-9401 Datasheet defines a maximum Voltage Input Low (VIL) and minimum Voltage Input High (VIH) of 0.8 V and 2 V respectively (with a maximum input voltage of 5.25 V). This indicates that the digital signal must fall between 0 - 0.8 V for the TTL gate to interpret a low logic level, and 2 - 5.25 V for the TTL gate to interpret a high logic level. A signal that falls within the range of 0.8 V and 2 V is undefined. The TTL gate may bounce arbitrarily between the low and high states, but the exact behaviour cannot be predicted.
Mitigating Undefined Signals
There are 2 ways to minimise the risk of an undefined signal:
- Use a device with a hysteresis.
- Use a Schmitt Trigger to implement a hysteresis.
A hysteresis will eliminate the immediate transition to uncertainty outside of the voltage thresholds. For example, if the signal falls below the minimum VIH threshold, the output will remain high until the signal continues to fall below the hysteresis level.
Below is a list of C Series Digital Modules and whether or not they have a hysteresis: