Error -1073807294 (Hex 0xBFFF0042) The Specified Trigger Line is Currently In Use

Issue Details

• When deploying my VeriStand project to my PXI, I get the following error and cannot deploy.

Deployment Error
Project Window.lvlib:Command Loop.vi >> Project Window.lvlib:Connect to System.vi

Possible reason(s):
VISA: (Hex 0xBFFF0042) The specified trigger line is currently in use.
===================================
NI VeriStand: VISA Assert Trigger in NIVeriStand Trigger Routing.lvlib:Unreserve TTL0 in all bus segments.vi->NIVeriStand Trigger Routing.lvlib:Conditionally clear chassis reservation.vi->NI Veristand Engine.lvlib:VeriStand Engine State Machine.vi->NI Veristand Engine.lvlib:VeriStand Engine.vi->NI Veristand Engine.lvlib:VeriStand Engine Wrapper (RT).vi

Solution

This error occurs when the Chassis master hardware synchronization device VeriStand uses to synchronise all of your channels is changed.

VeriStand reserves some lines in the PXI chassis to share clocks and triggers. VeriStand selects the best timing source out of the cards added to your Veristad project and sets this card to be the Chassis master hardware synchronization device.

When the Chassis master hardware synchronization device changes, such as using a different project with a different Chassis master hardware synchronization device or some project is edited to use a different source for the Chassis master hardware synchronization device, the new synchronisation source tries to use the already reserved trigger lines.
These reservations on the trigger lines persist after an undeployment and have not been reset or released yet.

For example, if you deploy a VeriStand project with an FPGA card and a DAQ card, usually the FPGA card will be used as the Chassis master hardware synchronization device (the card's name will appear in blue in your VeriStand system definition file to reflect this). If you deploy this project but then undeploy and remove the FPGA card, VeriStand will select the new best synchronisation source, the DAQ card. The trigger lines have remained reserved and so on deploy, you will receive error -1073807294.

You will find the Chassis master hardware synchronization device setting here:


To resolve this, do any of the following:

• Set the same Chassis master hardware synchronization device for all of your deployments/projects. See: Setting a Chassis Master Hardware Synchronization Device.
• Clear the reservations on the PXI backplane and trigger lines by:

1. Save anything you want to keep as you will reboot the chassis in the following steps.
2. Reset the chassis in NI Measurement & Automation Explorer (MAX) using Reset, with the chassis selected.

3. The chassis will now have its mappings reset.
4. If this has not helped, power cycle the PXI system to remove any lingering reservations

Additional Information

The NI System Configuration Driver allows you to programmatically control your NI hardware, including resetting the hardware.
If you would like to automate the resetting of the hardware to free up any lingering reservations on the trigger lines, see the following VI for a starting point:
C:\Program Files (x86)\National Instruments\LabVIEW 20XX\examples\nisyscfg\Reset All Devices.vi
Where 20Xx is the version of LabVIEW you are using.
If using the 640bit version of LabVIEW, check: C:\Program Files\National Instruments\LabVIEW 20XX\examples\nisyscfg\Reset All Devices.vi