FPGA Bitfile Does Not Contain all FIFOs Configured in my LabVIEW Project

Updated Jun 11, 2023

Reported In

Software

  • LabVIEW FPGA Module
  • FPGA Xilinx Compilation Tools

Driver

  • NI CompactRIO
  • NI R Series Multifunction RIO
  • FlexRIO

Issue Details

I have an FPGA project in LabVIEW and want to interact with the FPGA FIFOs from my host VI.

When the Open FPGA VI Reference Function VI is configured to open the FPGA VI as reference, the Invoke Node lists all configured FIFOs.

When changing the configuration to open the Bitfile as reference, some FIFOs are missing in the Invoke Node.

Solution

The descibed behaviour is intented, if your FPGA code never calls the part, where you placed the missing FIFO.

LabVIEW FPGA module analyzes the code and removes code and therefore elements like FIFOs, which are never called to save resources on the FPGA.
As this only happens during the building process of the bitfile, LabVIEW offers the resources in the host VI, as long as you open a reference to the FPGA VI.