Solution
This issue occurs when code that was developed for a specific version of an FPGA (or sometimes on a different LVFPGA version), and is being used on another variant. The FPGA VHDL constants are not the same on the new hardware, and they cannot match the old code. In these cases, we end up needing to remove block diagram components and re-add them to refresh the constants.
In order to resolve this error please follow the steps below:
1. Disable all FPGA components like I/O nodes, DMA FIFOs, etc., on the FPGA VI and try to compile it. The goal is to find which components are causing the error.
2. Enable FPGA components one by one and attempt to compile the FPGA VI. As soon as you receive the error message, delete the FPGA component and re-add them to the VI. In the case of DMA FIFOs, you must delete them from the project itself and create new ones.
3. Repeat the above step until you have a successfully compiled VI.
If you find that the issue lies with a certain type of FPGA component, it is usually safer to delete all components of that type and re-add them to the VI or the project.