Xilinx FPGA CIC Interpolator 4-Wire Handshaking Input/Output Nodes in LabVIEW

Updated Jun 26, 2020

Issue Details

I'm trying to use the Xilinx IP delivered with LabVIEW FPGA inside my project, and I have to implement 4-wire handshaking, and I don't understand the meaning of the input/output nodes.

Solution

Four synchronization inputs/outputs are available with these nodes, and each one is related to the usual 4-wire handshaking signal you will see in LabVIEW :

  1.  m_axis_data_tready >> ready for output
  2.  s_axis_data_tvalid >> input valid
  3. s_axis_data_tready >> ready for input
  4. m_axis_data_tvalid >> output valid

Additional Information

For more information on how to interconnect Xilinx IP functions to LabVIEW functions, please check this help page

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