There are several possible reasons a DAQ device output can be delayed, but one possibility is the delay
caused by the buffer on the DAQ device combined with low sampling rate.
The buffer contains the signal to be output on a FIFO basis, this needs to be output at the specified sampling rate before the new signal can be output.
To elaborate, if the output buffer was 8192 samples, and the signal was written at 1000 S/s, there will be a
8 second delay before the new signal is finally output.
One solution to reduce this lag is to increase the sampling rate (such as 100kHz) so that the data stored in the buffer does not take time to be output.