Controlling NI USRP RIO ‘PPS Trig Out’ Line From Host

Updated Apr 26, 2021

Reported In

Hardware

  • USRP-2974

Driver

  • NI-USRP

Operating System

  • Windows

Issue Details

I am using NI-USRP drivers and would like to drive the ‘PPS Trig Out’ line of Windows-based USRP RIO 2974. Is it possible to control this line from the host side and output my own custom digital logic?

Solution

It is not possible to operate the ‘PPS Trig Out’ line of any USRP RIO from the host when using NI-USRP drivers. However, if using ‘NI-USRP Simple Streaming’ projects based on USRP RIO drivers, this can be achieved with minor FPGA modification and recompilation of the FPGA code. 

Additional Information

Please note that when using NI-USRP drivers, the 'niUSRP Export Signal.vi' located at 'NI-USRP>Synchronization' sub-palette can be used to export some internal signal using 'PPS Trig Out' IO.

When using ‘NI-USRP Simple Streaming’ projects with USRP RIO drivers, the ‘PPS Trig Out’ line appears as an FPGA IO. To operate it from the host, make a control on the FPGA top-level VI that connects to this IO. On the host VI, use ‘FPGA read/write Control’ to access this control. However, please note that these lines are also used in multi-device synchronization and thus cannot be user-controlled in that scenario.

Other USRP RIO IOs, such as 'PPS Trig In' and other Aux IOs can also be accessed from ‘NI-USRP Simple Streaming’ projects in a similar way.