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Differential mode can remove common mode noise, so more accurate voltage acquisition is possible. However, when the common mode largely exceeds the analog input range, the differential amplifier can not remove the common mode normally, resulting in measurement error. Therefore, it is necessary to reduce the common mode by grounding the bias resistor to the circuit and letting off the common mode current.

There is no finite definition of the magnitude of the bias resistor. The user must calculate the required bias resistor size for their measurement.

* Reference bias resistance value: 100 kΩ ~ 1 MΩ

If the resistance value is too large, discharge can not be properly performed, and it does not work to release current. If the resistance value is too small, the input impedance decreases as a parallel resistance, causing measurement error as a voltage dull (gain error). Therefore, when choosing the bias resistor, it is necessary to install a resistance as small as possible within the range not affected by the gain error.

Therefore, it is necessary to consider the theoretical value of the proper bias resistance considering the resolution of the DAQ board.

Assume that bias resistors (R1, R2) are installed as shown in the figure below.

* It is necessary to install resistors of the same value for R1 and R2. When a resistor of a different value is installed, common mode noise can not be discharged in a balanced manner, and common mode voltage is measured as normal mode noise, which causes measurement error.

Here, it is necessary to select a resistor that does not cause the value of the combined resistance to be sufficiently higher than the input impedance and causing the voltage to drop. The reference value at this time is the minimum resolution (LSB) based on the resolution of DAQ.

In the case of M series (PCI-6251), since the resolution is 16 bits, it can measure up to the value of 65535 (2^16 - 1) of the input range. Therefore, it can be said that the rounding of the voltage due to the bias resistance is within the negligible range by installing a resistor such that the voltage dull (gain error) generated when the bias resistor is installed is 1/65535 or less.

### Example:

First, the bias resistors R1 and R2 are connected in series via the ground line. Therefore, the combined resistor part in series becomes R1 + R2 and is connected in parallel to the input impedance of 10 GΩ. The overall combined resistance value approaches R1 + R2 because the input impedance (10 GΩ) is sufficiently large. The voltage value divided by comparing the combined resistance value (≈ R1 + R2) obtained here with the output impedance side must be less than LSB.

Output impedance (0.2 Ω) / combined resistance (≈ R1 + R2) ≤ 1/65535

Therefore, it is necessary to install a resistor with R1 = R2 = 6.5 KΩ or more. However, since this is a theoretical value, we recommend placing a bias resistance of about twice the above resistance value with a margin.

(When using a device with 12 bit resolution such as E series, it will be smaller than this value.)

The BNC type differential mode terminal block has the bias resistor installed in advance.

Please refer to the following link for detailed explanation of resolution.