View the complete Teaching Digital Logic Fundamentals tutorial series
Digital comparators are common combinational logic circuits used in CPUs and microcontrollers. The basic function of a digital comparator is to compare two binary quantities and generate a 1 or a 0 at the output depending on whether they are equal or not. In this tutorial we will design a parallel binary comparator circuit that compares a 4-bit binary number A to a 4-bit binary number B. If the binary quantities are equal, the output will generate a HIGH level.
The Multisim PLD Schematic will be used to capture and simulate the comparator circuit and, for a hands-on approach to learning, the PLD Schematic will be exported to a Digilent Nexys 4 FPGA board so that students can interact with real hardware.
Whilst this tutorial and the accompanying example were produced using the Digilent Nexys 4 the same could be achieved on other Digilent boards. More details on installing and deploying to the range of Digilent boards can be found here:
Getting Started with Digilent Boards in Multisim
Based on the logic gates theory we know that the exclusive-NOR (XNOR) gate can be used as a basic comparator because its output is 1 only when the two inputs are equal. To demonstrate this we can use the Logic converter instrument in Multisim to obtain the truth table for the XNOR gate.
In order to compare binary numbers with two bits each, we can use an additional XNOR gate and an AND gate, as shown below:
As you can see, one of the XNOR gates compares A0 and B0, which are the least significant bits (LSBs). The most significant bits (MSBs), A1 and B1, are compared by the bottom XNOR gate. Finally, the AND gate evaluates the outputs of the XNOR gates to determine equality. When the two inputs bits for each XNOR gate are equal, their outputs are 1 and therefore the output of the AND gate is 1, this indicates equality.
In the next figure you can see the truth table for the 2-bit comparator circuit.
Following the same approach, we can build a 4-bit comparator using four XNOR gates and one AND gate with four inputs, as shown below:
In this section we use the Multisim PLD Schematic to simulate the 4-bit parallel binary comparator. We will create a top level schematic with all the necessary components (for instance: switches) to simulate the circuit and also a PLD subcircuit with all the digital logic.
The switch pack (S1) and the probe (X1) will be used to simulate the slides switches (SW0 to SW7) and LED0 of the Nexys 4 board.
Now we are ready to deploy the PLD schematic to the Digilent Nexys 4 FPGA board. Connect the board to your computer and follow the next steps.
After the PLD schematic have been successfully deployed to the Digilent board, experiment with the switches SW0 to SW7 to confirm the operation of the parallel binary comparator; observe the result in LED0.
All the files for this tutorial can be found in the attached file. This tutorial provides an example of how students can design, simulate and deploy digital logic with Multisim and Digilent FPGA boards
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