The NI-1483 Camera Link Adapter Module for FlexRIO extends the NI FlexRIO family of products to include vision acquisition. With this Camera Link NI FlexRIO adapter module, you can perform field-programmable gate array (FPGA) processing on images acquired from Camera Link cameras. This document describes some of the functionality of the NI-1483 and the LabVIEW FPGA Module for image processing. The Camera Link bus, designed for relatively high-performance image acquisition, delivers the highest throughput of any camera bus. This makes Camera Link an ideal fit for FPGA image processing. You can now combine high-performance image acquisition with low-latency, high-speed, FPGA hardware processing. The NI-1483 supports 80-bit, 10-tap Base, Medium, and Full Camera Link configurations with a pixel clock frequency of up 85 MHz. You can attach it to any FlexRIO FPGA module.
The following software is required for this tutorial:
LabVIEW 2009 or later
LabVIEW FPGA Module 2009 or later
NI-RIO 3.4 or later driver software
NI-IMAQ 4.4 or later driver software, which is included with NI Vision Acquisition Software
(Optional) Vision Development Module 2009 or later
The following hardware is required for this tutorial:
FlexRIO adapter module (NI-1483 Camera Link Adapter Module for FlexRIO)
FlexRIO FPGA module
Before installing the NI-1483 Camera Link Adapter Module for FlexRIO, you must install the application software and device driver. Install the software in the following order:
This section describes how to unpack and install the FlexRIO FPGA module and the NI-1483.Note: You must install the software before installing the hardware. For software installation information, refer to Step 1. Install Application Software and Driver.
The NI FlexRIO FPGA module and the NI 1483 are shipped in antistatic packages to prevent electrostatic discharge from damaging device components. To prevent such damage when handling the device, take the following precautions:
Ground yourself using a grounding strap or by holding a grounded object, such as your computer chassis.
Touch the antistatic package to a metal part of the computer chassis before removing the device from the package. Caution: Never touch the exposed pins of connectors.
Remove the device from the package and inspect the devices for loose components or any other sign of damage. Notify NI if the device appears damaged in any way. Do not install a damaged device in the chassis. Store the FlexRIO FPGA module and NI 1483 in the antistatic envelopes when not in use.
You must install the software before installing the hardware. For software installation information, refer to Step 1. Install Application Software and Driver.Caution: Refer to the Read Me First: Safety and Electromagnetic Compatibility document packaged with your PXI/PXI Express chassis or device before removing equipment covers or connecting or disconnecting any signal wires.
Power off and unplug the PXI/PXI Express chassis. Refer to your chassis manual to install or configure the chassis.
Identify a supported PXI/PXI Express slot in the chassis. If you are using a PXI Express chassis, you can place PXI devices in the PXI slots. If a PXI device is hybrid-slot compatible, you can use the PXI Express hybrid slots. PXI Express devices can be placed only in PXI Express slots and PXI Express hybrid slots. Refer to the chassis documentation for details. Tip: PXI FlexRIO FPGA modules are compatible with PXI slots and PXI Express hybrid slots. PXI Express FlexRIO FPGA modules are compatible with PXI Express slots and PXI Express hybrid slots. NI does not recommend using FlexRIO FPGA modules in PXI Express system timing slots because the modules do not have timing features.
Remove the filler panel of an unused PXI/PXI Express slot.
Touch any metal part of the chassis to discharge any static electricity.
Place the PXI/PXI Express module edges into the module guides at the top and bottom of the chassis and slide the module into the chassis until the module is fully inserted.
Secure the device front panel to the chassis front-panel mounting rail using the front-panel mounting screws.
Plug in and power on the PXI/PXI Express chassis.
Select Start»All Programs»National Instruments»Measurement & Automation to open Measurement & Automation Explorer (MAX).
Expand Devices and Interfaces.
Verify that the device appears under Devices and Interfaces»RIO Devices.
Gently insert the guide pins and the high-density card edge of the NI-1483 into the corresponding connectors of the FlexRIO FPGA module. The connection may be tight, but do not force the adapter module into place.
Tighten the captive screws on the NI-1483 to secure it to the FlexRIO FPGA module.
NI recommends that you use the following cables to connect your camera to the 26-pin SDR connectors on the NI-1483:
MDR to SDR Camera Link cable (part number 199745A-05)
SDR to SDR Camera Link cable (part number 199746A-05) Note: To ensure the high-speed signaling of the Camera Link interface, National Instruments recommends that you purchase a Camera Link cable rather than build a custom cable.
You can use the NI 1483 with the following I/O accessories:
NI 17xx 5 m pigtail breakout cable (part number 197818-05)
NI 17xx unshielded screw terminal breakout with 2 m cable (part number 780261-01)
This section demonstrates how to use an existing LabVIEW FPGA example project to acquire images with the NI 1483R.Note: Examples available for your device are dependent on the device-specific minimum software requirements. For more information about software requirements for your device, refer to Step 1. Install Application Software and Driver.
Each NI-1483R example project includes the following:
A LabVIEW FPGA VI that you can compile and run on FPGA hardware
•A Host VI that runs in LabVIEW for Windows and interacts with the LabVIEW FPGA VI
Note: In software, NI FlexRIO adapter modules are referred to as IO Modules.
Complete the following steps to run an example that acquires an image with the NI 1483:
Connect a Camera Link camera capable of outputting a 1-tap, 10-bit image to the NI-1483. Ensure that the camera is powered on.
This example shows how to use a frame trigger to acquire images from the camera. To use an external trigger source, connect the TTL I/O 0 pin on the D-Sub connector to the trigger source using either a breakout cable or terminal block. If you do not have an external trigger source, you can trigger the camera with a software trigger.
In the Getting Started window, click Find Examples to display the NI Example Finder.
In the NI Example Finder window, select Directory Structure.
Browse to the example folder for the NI 1483 by selecting Hardware Input and Output»FlexRIO»IO Modules»NI 1483.
Select 1-Tap 10-Bit Camera with Frame Trigger and then 1-Tap 10-Bit Camera with Frame Trigger.lvproj.
In the Project Explorer window, expand the tree view for the FPGA target you are using.
Right-click 1-Tap 10-Bit Camera with Frame Trigger (FPGA).vi and select Compile. Note: Depending on your hardware configuration, compiling may take 30 minutes to an hour.
In the Project Explorer window, double-click 1-Tap 10-Bit Camera with Frame Trigger Snap (Host) VI under My Computer to open the host VI. The VI uses the NI PXIe-7962R as the FPGA target. If you are not using the NI PXIe-7962R, complete the following steps to change the FPGA target.
In the host VI front panel window, select Window»Show Block Diagram to open the VI block diagram.
On the block diagram, right-click the Open FPGA icon (NI PXIe-7962R) and select Configure Open FPGA VI Reference.
In the Configure Open FPGA VI Reference window, click the Browse Project button in the Open VI section.
In the Select VI window that opens, expand the tree view for your device, select the VI under your device and click OK.
Click OK in the Configure Open FPGA VI Reference window.
Save the VI.
On the front panel, select your NI FlexRIO device from the RIO Device drop-down listbox.
In the Image Width and Image Height spin boxes, enter the values that match the camera output.
The value of the Trigger Pulse Width (us) spin box controls the pulse width of the frame trigger that is sent to the camera on Camera Link control line 1. Set this value to satisfy the pulse-width requirements of the camera in use.
Set the Start Serial Server? button to true to enable the serial server. The button illuminates when true. You can use the serial server to communicate with the camera, and configure the camera with the configuration utility provided by the camera manufacturer.
On the front panel of the 1-Tap 10-Bit Camera with Frame Trigger Snap (Host).vi, click the Run button to run the VI. Check if the I/O Enable? and Initialized? status indicators are lit. If I/O Enable? is not lit, verify that the NI 1483 adapter module is properly connected to the NI FlexRIO FPGA module. If Initialized? is not lit, verify the camera is properly connected and powered on.
If the camera is not configured for triggering using Camera Link control line 1, configure it using the camera manufacturer’s configuration utility. Verify that the camera width and height configuration matches the values entered in the Image Width and Image Height spin boxes. The host VI must be running for the manufacturer’s configuration utility to be able to communicate with the camera.
Once the camera is configured, click the Snap button on the VI front panel. Clicking Snap initiates a single-frame acquisition. If the camera is properly configured, it does not output a frame until a trigger is provided. Supply a trigger by sending a pulse on TTL I/O 0 or by clicking the SW Trigger button. Repeat this step to acquire another image.
Click the STOP button to stop the VI.
Close the VI.
The LabVIEW FPGA Module includes a feature for HDL IP integration called CLIP. FlexRIO devices support two types of CLIP: user-defined and socketed.
With a user-defined CLIP, you can insert HDL IP into an FPGA target, enabling VHDL code to communicate directly with an FPGA VI.
FlexRIO devices also support socketed CLIP, which provides the same IP integration functionality of the user-defined CLIP while allowing the CLIP to communicate directly with circuitry external to the FPGA. Adapter module socketed CLIP allows your IP to communicate directly with both the FPGA VI and the external adapter module connector interface.
NI-1483 is shipped with socketed CLIP that you can use to add module I/O to the LabVIEW project. This CLIP developed by NI supports Base, Medium, Full, and 80-bit Camera Link configurations. Camera Link data outputs on 10 eight-bit Camera Link ports (A through J) along with flags, all of which are synchronous to the user-selected Image Data Clock. The CLIP also provides access to the Camera Link serial interface, four camera control lines, four TTL I/O lines, two isolated inputs, and inputs for a quadrature encoder.
Refer to the NI FlexRIO Adapter Module Support Help topic of the LabVIEW Help for information regarding NI FlexRIO CLIP, configuring the NI-1483 with a socketed CLIP, and a list of available socketed CLIP and provided signals.
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