The firmware for the NI-9144 is written as a .FoE file. When the .FoE file is written to the NI-9144, it overwrites the FPGA bitfile, using a data transfer mechanism called File Over EtherCAT. Due to the fact that the .FoE file is rewriting the FPGA, which contains user-defined variables (UDVs), the UDVs will be overwritten when the firmware is flashed.
To resolve this issue, you must download the firmware first and then use a second .FoE file generated from your bitfile to restore your UDV/bitfile configuration.
Complete the following steps to achieve this:
- Create the UDVs and the VI that would be running on your NI-9144 FPGA
- Compile the FPGA VI.
- Right-click on the FPGA VI and select Create Build Specification.
- Right-click the build specification and select Build.
- Deploy your EtherCAT master configuration from your LabVIEW project. (Only if you do not use the Scan Engine "Refresh Modules" function for programmatic detection and Deploy).
- Right-click your EtherCAT target and select Deploy.
- Generate a personalized .FoE file: Download it to the EtherCAT target.
- For LabVIEW 2018 and later: Right click the build specification and select Download and if prompted, change to Configuration Mode. This will automatically generate a .FoE file. You can also use the Bitfile2FOE_Converter_2018_for_9144 or Bitfile2FOE_Converter_2018_for_9145 tools attached below to do this manually if needed.
- Upload the .FoE file to the CompactRIO by using the FTP method or other file transfer protocols. The .FoE file will be located in in the FPGA Bitfiles Folder with your compiled FPGA bitfiles. Ensure that the .FoE file has the same name as the bitfile (.lvbitx).
- Run the WriteFOE.vi from the CompactRIO. Be sure to change the path and name of the .FoE file.