Peer-to-Peer (P2P) Transfer Rate Slower than Expected Between FPGA Modules

Updated Feb 25, 2019

Reported In


  • PXI FPGA Module for FlexRIO


  • LabVIEW FPGA Module


  • FlexRIO

Issue Details

I have implemented a Peer-to-Peer transfer between two modules, but the throughput seems to be slower than it should be. Where does it come from, and how can I improve it ?


When implementing a Peer-to-Peer FIFO, 2 FIFOs needs to be created, one Reader and one Writer. For the first exchange, the Reader FIFO will initially grant his full depth (in number of elements) of flow control credits to the Writer, allowing the Writer to send data. Then, each time 1/4 of the Reader FIFO depth is read out, the Reader will grant 1/4 of the FIFO depth, again, to the Writer.

As this mecanism have a minimum latency of 1µs, in the best cases, you need to give to your Reader FIFO a size large enough in order to absorb the latency of the mecanism described above. Increasing the Reader FIFO size may correct this problem.

Additional Information

The unfortunate impact of this phenomenon is that as we increase the data transfer rate between FIFOs, we need to make the P2P readers sufficiently large enough to allow a continual stream of flow control credits that allow the P2P writer to send data without getting pushed back by the P2P reader's permission granting process.


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