Which Bus Can I Use to Program My USRP RIO?

Updated Jun 12, 2018

Reported In

Hardware

  • USRP Software Defined Radio Reconfigurable Device
  • USRP Software Defined Radio Device
  • USRP RIO Cable
  • USRP RIO Cable for Ettus

Driver

  • NI-USRP

Issue Details

The USRP RIO has a PCIe interface, 1 Gigabit Ethernet interface, and 10 Gigabit Ethernet interface.  Which interfaces are compatible with the host based NI-USRP driver and which are compatible with LabVIEW FPGA?

Solution

The chart below shows bus connectivity and tool flow options for the USRP RIO. 
 
 UHD
(fixed FPGA)

LabVIEW Host
(based on UHD
& fixed FPGA)

Xilinx Vivado
(Verlog source
from UHD is the
starting point)

LabVIEW FPGA
(entirely LabVIEW
FPGA source is the
starting point)
SFP Port 0
(1GbE)
XXX 
SFP Port 1
(10GbE)
XXX 
Calbed PCIe
(MXIe)
XXXX
FPGA Debug
over USB JTAG
  X 
FPGA Debug
over PCIe/MXIe
   X

Due to startup configuration done from the host, after the FPGA has been programmed in LabVIEW FPGA, it is not possible to use another bus for communication.  Only the PCIe bus is support with LabVIEW FPGA.


 
 

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