Missing Data Samples from LabVIEW FPGA

Updated Mar 6, 2018

Reported In


  • LabVIEW FPGA Module

Issue Details

I'm reading samples of data from my LabVIEW FPGA code, and it appears that some of the samples are not coming through. Why is this happening and how can I fix it?


If you need high resolution data from your FPGA, use a DMA FIFO to ensure that you receive every sample.

Additional Information

This issue often occurs when you use FPGA front panel communication. When you read from front panel controls, you only read the latest value, so it is possible to miss values. Take the following example:
  1. FPGA updates front panel every 5 ms.
  2. Host reads every 10 ms.
In this case, the host will only see half of the samples written, because the FPGA will sometimes overwrite the data before the host gets a chance to read.


Not Helpful