Can I Display VHDL or Verilog Code Graphically in LabVIEW FPGA?

Updated Feb 23, 2018

Reported In

Software

  • LabVIEW FPGA Module

Issue Details

I've been developing some VHDL code for one of my FPGA devices. Can I open up this VHDL code in LabVIEW to display and debug it graphically?

Solution

No, NI does not offer a solution to graphically display VHDL or Verilog code in LabVIEW FPGA. It is possible however to import external IP into LabVIEW FPGA using the CLIP Node, which allows you to run LabVIEW FPGA and VHDL/Verilog code simultaneously on Xilinx FPGAs.

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