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Archived:Removing Glitches from Digital and Counter Input Signals

Updated Apr 25, 2024

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Reported In


  • PXI-6071E
  • PXI-6070E
  • PXI-6052E
  • PXI-6040E
  • PXI-6030E
  • PXI-6031E
  • PXI-6025E
  • PCI-6070
  • PCI-6071
  • PCI-6052E
  • PCI-6040
  • PCI-6035
  • PCI-6032
  • PCI-6031
  • PCI-6025E
  • PCI-6023E
  • PCI-6024E
  • PCI-6010
  • PCI-6013
  • PCI-6014


  • NI-DAQmx

Issue Details

My digital or counter task seems to be reading values incorrectly, and I suspect it may be due to a noisy input signal. How do I apply a debounce filter to my digital signal?

My digital or counter input signal has a lot of small pulses that accompany the pulse I want to read. How do I remove those small pulses?


Note: If your device supports digital filtering, please reference How Do I Enable Digital Filtering on My Multifunction DAQ Device? The solution below is specifically meant for 60xx DAQ users.

To configure a filter on your 60xx DAQ device, configure a counter for retriggerable pulse generation. Set the source of the counter to the 20MHz clock and connect your digital signal to the gate of the counter. In the pulse configuration, specify the smallest pulse width that completely encompasses all of the bounces or glitches. This works because the counter gate circuitry ignores all signals read after triggering on the first signal, while outputting a pulse on its output.

For example, suppose you have a pulse that is 1 ms in duration and is surrounded by glitches 0.2 ms before the pulse and 0.2 ms after the pulse. You can configure a counter for retriggerable pulse generation and  set the pulse width to be 1.4 ms (0.2 + 1 + 0.2 ms) in width. This will effectively treat your digital event as one event and ignore the small glitches.

Additional Information

When you have a digital pulse that is accompanied by smaller "glitch" pulses (Figure 1), you can use a counter to filter, or represent, that pulse event (including the glitches) as one pulse. This is particularly useful when measuring an encoder or mechanical event, such as a button push, which are prone to signal bounce (glitches).

Figure 1. Oftentimes, a switch between digital states is accompanied by several unwanted pulses (switch bounce).  This can be ignored using the methods described below.
If you must have a pulse width equivalent in size to your incoming pulse you can set the delay specs on the pulse output of the counter to be equal to the glitch intervals. All pulsed outputs will have a pulse width and a delay associated with the counter generation. Select the duration of this delay to be as small as the hardware will allow.

It is important to note that if you are expecting digital events to occur within a period of time smaller than the pulse output of the counter, you will miss these digital events. It is important to make the pulse width of the counter small enough such that you do not miss any of your real digital events, but large enough such that it encompasses all glitches.