What Is the Throughput, Speed, and Size of My Vision Acquisition Bus?

Updated Jan 11, 2018

Reported In

Hardware

  • Starter Kit for ISC-178x Smart Cameras
  • Camera Link Cable
  • Basler 1394 Camera
  • Camera Link I/O Board
  • PCI-1422
  • PXI-1422
  • PCI-1428
  • PCI-1429
  • PCIe-1429
  • PCI-1426
  • PCI-1424
  • PCIe-1430
  • PMI 1430
  • PCIe-1433
  • PCIe-1427
  • PXIe-1435
  • PCIe-1473
  • NI-1483
  • PCI-8252
  • PXI-8252
  • PCI-8254
  • PCIe-8255
  • PCIe-8244

Driver

  • NI-IMAQ

Issue Details

I am evaluating certain bus characteristics of my Vision Acquisition device interface. What is the throughput, speed, and size of my Vision Acquisition bus?

Solution

When selecting a vision system, the computer bus is an important consideration.The internal computer bus allows all internal computer components to connect to the CPU and main memory. The expansion bus allows I/O devices to access the CPU and memory. NI image acquisition (IMAQ) products use five expansion bus technologies: PCI/PXI, PCIe/PXIe, USB, IEEE-1394 (Firewire), and GigE.
The size of the bus, known as its width, is important because it determines how much data can be transferred at one time. For example, a 16-bit bus transfers 16-bits of data through the 16 parallel data lines on the bus. But, in the case of image acquisition, the pixel depth of the image plays an important role in bus performance. The most common form of the PCI bus transfers data 32 bits at a time. If an image format of 10 or 12-bit is used, then each pixel is transferred over the bus as 16-bits, or 2 bytes. This transfer affects the effective throughput of the frame grabber. The speed of this transfer is controlled by the bus clock speed. A fast clock speed allows data to be transferred faster.

Note: For buses with a data width of 1 bit, clock speed is equal to throughput.

The following table summarizes the specifics for each expansion bus technology supported by NI image acquisition products. The throughputs listed here are theoretical; in actual operation wait states, interrupts, and other protocol factors combine to reduce theoretical bandwidth.
 
BusThroughput (MB/s)Clock Speed (MHz)Width (bits)Supported NI Board(s)
PCI13333.33321422/1424/1426/1428
PXI13333.33321428
x1 PCIe200100*321427
x4 PCIe800100*321429/1430/1433/1473R
x4 PXIe800**100*321435/1483R
IEEE1394a (Firewire400)50N/A18252/8254R/8255R
IEEE1394b (Firewire800)100N/A8255R
GigE125N/A18231/8234/8235
USB 1.01.5N/A1N/A
USB 2.060N/A1N/A
USB 3.0 ***400N/A18242/8244
 
*100 MHz is the official reference clock speed for the PCIe interface. But can sometimes be adjusted in the BIOS, usually in 1MHz increments.

** The PXIe-1435 can achieve speeds above 800 MB/s when using 256B payloads (a feature common in workstation-class chipsets.)

*** USB 3.0 support was added in the August 2013 release of Vision Acquisition Software.

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