This content is not available in your preferred language.

The content is shown in another available language. Your browser may include features that can help translate the text.

Difference Between Configuring the Number of Elements in a FIFO and Requesting the Depth of the FIFO

Updated Jul 8, 2019

Reported In


  • LabVIEW FPGA Module
  • LabVIEW Full
  • LabVIEW Professional
  • LabVIEW Base
  • LabVIEW Real-Time Module

Issue Details

After I create a Target to Host FPGA FIFO in a project, I can select how many elements it will contain by right-clicking and selecting Properties (shown below):

When I open a reference to the FPGA VI on a host VI, I have options to request the depth of that FIFO via the FIFO.Configure Invoke Node (shown below):

What is the difference between these two methods, and how does it relate to the actual size of the FIFO?


A Target to Host FIFO is structured such that there are two FIFOs (or buffers) that data is sent between, via a Direct Memory Access (DMA) channel.

The first buffer exists solely on the FPGA target and is configured in the project.

The second buffer exists solely on the Host.  The depth of this buffer that can be requested via an Invoke Node on the Host VI.

The FPGA buffer will retain any data written to it on the FPGA VI, before it is streamed to the Host buffer via DMA. The streaming of the data via DMA happens automatically and cannot be configured in any way.

The Host buffer receives any data sent via DMA until that data is read out of the buffer in the Host VI.

Additional Information

If you don't specify the size of the host buffer, it will coerce to either 10,000 elements or twice the maximum number of elements that can be held in the FPGA buffer, whichever is largest.