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After I create a Target to Host FPGA FIFO in a project, I can select how many elements it will contain by right-clicking and selecting Properties (shown below):
When I open a reference to the FPGA VI on a host VI, I have options to request the depth of that FIFO via the FIFO.Configure Invoke Node (shown below):
What is the difference between these two methods, and how does it relate to the actual size of the FIFO?
The first buffer exists solely on the FPGA target and is configured in the project.
The Host buffer receives any data sent via DMA until that data is read out of the buffer in the Host VI.
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