Error -543: When Using Xilinx Compilation in LabVIEW FPGA Module

Updated May 10, 2019

Reported In


  • LabVIEW Full
  • LabVIEW FPGA Module
  • FPGA Xilinx Compilation Tools

Issue Details

When compiling LabVIEW FPGA code, I got the error -543 with the message, "LabVIEW FPGA: The compilation failed due to a Xilinx error.". How can I fix it?


Xilinx Error -543 occurs due to overuse of resources that is design complexity resulting in difficulty placing the design. Please follow the below steps to solve the problem.
  • Adjust the build settings to optimize for area(Note: this may increase compilation times, and may result in performance trade-offs).
  • Optimize your code. Try the following best practices and optimization techniques within your LabVIEW FPGA code.
    • Reduce the amount of logic in the VI
    • Reduce the number of multiplications, FIFOs, and/or amount of memory on the block diagram
    • Reduce the number of objects on the front panel
    • Change arbitration settings
    • Use Timed Loops instead of other loops
    • Use Timed Loops for resource-intensive sections of the block diagram that do not require any looping

Additional Information

There are more common Xilinx error codes related to resource limitations. If you want to get more information, please refer to the below link.


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