If you are using PXI-6683 in the system timing slot of PXI chassis, enable System Timing Slot? in the front panel to override the backplane clock of your chassis with the disciplined oscillator of the PXI-6683.
Since the PXI-6683H is a hybrid card and does not fit in the timing slot of the chassis, it cannot override the chassis’ backplane directly. Instead, you will need to externally cable the disciplined on-board oscillator of the PXI-6683H to the 10 MHz Ref In connector on the chassis. (Consult your chassis’ user manual to ensure your chassis has a 10 MHz Ref In). Then disable System Timing Slot? in the front panel to override the backplane clock of your chassis with the clock routed externally from PXI-6683H.
IEEE 802.1AS related properties can be accessed using niSync Property Node.vi via dropdown Timing >> Time Reference >> 802.1AS. Refer to Target Support for Timing Properties and VIs section from NI-Sync LabVIEW API Help to determine whether or not a given property or VI is supported on Linux RT.
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