Error -61083 When Not Using FPGA

Updated Aug 27, 2018

Reported In


  • cRIO-9039


  • LabVIEW
  • LabVIEW Real-Time Module
  • LabVIEW FPGA Module

Issue Details

I am running code on my cRIO and am getting the following error:

"Error -61083: A hardware clocking error occurred. A derived clock lost lock with its base clock during the execution of the FPGA VI. If any base clocks with derived clocks are referencing an external source, make sure that the external source is connected and within the supported frequency, jitter, accuracy, duty cycle, and voltage specifications. Also verify that the characteristics of the base clock match the configuration specified in the FPGA Base Clock Properties dialog box. If all base clocks with derived clocks are generated from free-running, on-board sources, please contact National Instruments technical support at"

I do not have any FPGA code however. How can I fix this?


This can usually be fixed by power cycling the device.