Solution
1. Please refer to
this document to confirm that your driver installation is correct. The latest version of Multisim, released with
NI Circuit Design Suite 14.1 in February 2017, is only compatible up to
LabVIEW 2015 SP1 FPGA Module Xilinx Tools Vivado 2014.4. This means you will receive this message if you attempt to use a version of the Xilinx Compilation Tools for Vivado newer than 2014.4. Since multiple versions of the Xilinx Compilation Tools can exist on one computer, simply install and select a compatible version to continue exporting the PLD design.
2. Check the hardware connection of ELVISE and DSDB.
- Check if the ELVIS power cable is connected to the power supply interface and whether the USB data cable is properly connected to the PC.
- Check if the UART interface on the DSDB board is connected to the PC USB interface.
- Check if the power switches on the ELVIS and DSDB board are turned on separately.
The UART interface on DSDB and power switches of DSDB and ELVIS are all marked in the figure below.