How to Create Three-Phase Voltage Signal in FPGA

Updated Jun 23, 2018

Reported In


  • cRIO-9035


  • LabVIEW FPGA Module

Issue Details

I want to create three phase signal in my CompactRIO. I'm using a memory to create a 10000 point sine signal and then I'm using 2 feedback nodes in order to shift the phase of the signal and get three phase system. I'm delaying 3333 points with the first feedback node and 6666 points with the second. When I compile, I get the following error:


This is happening because there are lot of FPGA resources used by the feedback nodes and the compilation fails. The workaround to this situation is to use 3 different indexes to read from the memory instead of using 2 feedback nodes. If the indexes are 0,3333, and 6666 at the beginning and are updated in each iteration, we get the same effect than using the feedback nodes, but with less resources used.

1) Initialize the memory with 10000 point sine

2) Read from the same memory but with three different indexes in each iteration
3) A way of keeping the indexes updated could be with registers. Each register is initialized with its initial value (0,3333,6666) and is updated in each iteration. A code to check if the index gets to the final value (9999) is also needed.


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