How to Measure the Duty Cycle of PWM Wave

Updated Jul 4, 2019

Reported In

Hardware

  • Counter/Timer Device
  • FP-PWM-520
  • cDAQ-9174
  • cDAQ-9178
  • PXI-6133
  • cRIO Ring Terminal
  • FPGA I/O Cable
  • cDAQ-9172

Issue Details

The PWM wave is a periodic digital pulse. PWM wave has a wide range of applications in motor control, temperature control, and other fields. The key parameter of the PWM wave is the duty cycle. The duty cycle of PWM wave is adjustable. What methods can be used to measure the PWM duty cycle?

Solution

NI's DAQ board provides a wealth of resources to measure the duty cycle of PWM Wave, such as analog acquisition, digital IO, and counters. The R series FPGA boards and cRIO can also be used. We can change the duty cycle according to the following four methods:

(a) Using a counter to measure the duty cycle

  1. The simplest solution is to use counter half-cycle measurements. Supported counters need to have dual-edge detection features. The supported boards include M series (STC2 core), X series (STC3 core) data acquisition cards, and timer/counter boards. Cards (NI-TIO core) and partial C modules (DIO number ≤ 8), etc. Usually, the counter support this measurement should be 32-bit wide. The result of this method is accurate due to presetting the half-cycle time. You can find the shipping example (Meas Duty Cycle - Buffered - Finite.vi) from the following path: Hardware Inputs and Outputs >> DAQmx >> Counter Measurements >> Period or Pulse Width >> Meas Duty Cycle--Buffered-Finite.vi from the NI Example Finder (cDAQ 9174, 9178 has four counters, each slot can use counter resources. Only 5 and 6 slots in the cDAQ-9172 can be used counter resources).

                                                                

  1. For boards with two 24-bit counters, there is no double-edge detection. For example, PXI-6133 can use pulse width measurement to measure the high pulse width time and low pulse width time respectively to calculate the duty cycle.You can find the shipping example (Meas Pulse Width-Buffered-Finite.vi.) from the following path: Hardware Inputs and Outputs >> DAQmx >> Counter Measurements >> Period or Pulse Width >> Meas Pulse Width-Buffered-Finite.vi from the NI Example Finder.

                                               
(b)Using analog acquisition to measure duty cycle   
   This method mainly uses the pulse measurement VI in the waveform measurement palette. According to the periodic acquisition data to calculate the duty cycle. The method requires the analog acquisition has a sufficiently high sampling rate (the pulse frequency should be more than 5 to 10 times, this value depending on the duty ratio) to obtain enough waveform information to improve the accuracy of the duty cycle measurement. One drawback of using software to calculate the duty cycle is that the processing speed in general.

 
(c)Using the cRIO to measure the duty cycle 
    You should finish the following steps on the CompactRIO platform to achieve duty cycle measurement. First,  select the Scan Interface mode according to  C module that digital I/O bit width is less than or equal to 8 bits. Second, select the digital input module (such as the 9401) in the project. Third, right-click the property configuration interface and select the 'counter' in the dedicated digital configuration. You can configure the measurement mode for each counter. For example, CTR0 measures high pulses, CTR1 measures low pulses, and hardware links connect signals to DIO0 and DIO1 at the same time. 
 
(d)Using the FPGA to measure the duty cycle    
    The FPGA has an accurate 40 MHz clock-driven counter resource. The pulse width and period of the PWM wave can be calculated by recording the counter value of the signal along the changing moment, so as to calculate the duty cycle. The program is shown below. When actually invoking, Digital IO can be replaced with the module IO.
                                                    

 

WAS THIS ARTICLE HELPFUL?

Not Helpful