Distortion in Signals Transferred from NI FPGA to Host

Updated Sep 10, 2018

Reported In


  • LabVIEW FPGA Module

Issue Details

  • I am transfering known data from my FPGA to the Host using the DMA FIFO, however I am not getting the same output when I plot the data in the host. Why is this so?
  • A sine signal transfered from the FPGA to the host via DMA FIFO becomes a square on the host. Why is this so?


Distortions of the signal from the FPGA to the host can occur because of multiple reasons. The following may be one of them :
  • Incorrect DMA Datatype:

    Choosing the correct DMA FIFO datatype is essential as incorrect datatypes may lead to truncation or approximation of data, thus distorting the signal. As mentioned in the document Creating FIFOs in FPGA VIs (FPGA Module), Right click on the FPGA target in your project explorer window, select New>>FIFO to display the FIFO properties. For existing FIFOs, Double-Click the FIFO under the project explorer window to open the Dialog box. Now specify the appropriate datatype as to avoid any truncation or saturation. 

  • Waveform Chart/Graph Properties:

    Make sure you select the correct plot and interpolation settings of your Chart/Graph in the host VI. Refer to the help document of Graph/Chart for detailed information on them.


Additional Information

If the problem persists, it could be due to multitude of reasons. You need a good understanding of the LabVIEW FPGA and your application VI to troubleshoot. Alternatively, you could start building up your application using the DMA FIFO example(using LabVIEW Example Finder) in incremental steps to identify the step which causes this issue. Refer to the Related links section for information on using DMA. 


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