Determining Maximum PCL Rate For My Model Execution in VeriStand

Updated Mar 26, 2024



  • VeriStand

I need to execute my mathematical model and Primary Controller Loop as fast as possible. How can I estimate the maximum possible execution rate of PCL and Model Loops?

In order to determine the maximum frequency of the Primary Control Loop and Model Loop you can increase the Target Rate until the LP Count, HP Count, and Model Count System Channels become equal to zero and stay constant.
You can use the NI VeriStand Benchmark Tool to automate increasing Target Rate and verify that LP Count, HP Count, and Model Count System Channels equal zero. The instructions for determining a maximum PCL Rate for the model are the following:
  1. Download and unzip the utility from the NI VeriStand Benchmark Tool page.
  2. Launch the NIVS Benchmarker.exe application.
  3. Configure corresponding parameters in Select sys configs dialog window:
    1. Select a directory with .nivssdf files, that you are going to test. Each of the selected System Definition files will be tested to estimate its maximum PCL Rate.
    2. Set the desired PCL Rate to Converge to nearest control box.
    3. Set the Target IP of your controller.
    4. Choose a Result log file to save the test result.
  1. Click OK. The NI VeriStand Configuration Benchmarker window will appear, and the System Definition files will continuously deploy at different PCL frequencies until the maximum frequency at which the System Channels Counters (HP, LP, and Model Counts) will become equal to zero.
  1. Open Max Rate.txt and find the Maximum PCL Rate in Hz for every System Definition file.

The tool will let you know its progress as it goes through the configurations and write out a report at the end.

Next Steps

Please note that this tool is not officially supported by NI. Using it with VeriStand versions from 2012 onwards may result in unexpected behavior.