What is the Difference Between Period Jitter and Cycle to Cycle Jitter?

Updated Dec 13, 2023

Reported In

Hardware

  • PXIe-6548
  • PXI-6541
  • PXI-6542
  • PXIe-6544
  • PXIe-6545
  • PXIe-6547

Issue Details

In the Digital Waveform Generator specifications sheets, National Instruments specifies Period Jitter and Cycle-Cycle for the Onboard Clock. What is the difference between these two specifications?

Solution

Period Jitter is defined by the period difference between an actual clock cycle and an ideal, or theoretical clock cycle. Cycle to Cycle Jitter is defined by the difference in period between consecutive clock cycles. The experiments are taken from a sample of between 1,000 and 10,000 samples. Peak-to-peak values are taken from the largest value in this samples size, and RMS values are calculated by taking a Gaussian curve of all samples, and reported as one standard deviation.

Related Links

Digital Timing: Clock Signals, Jitter, Hystereisis, and Eye Diagrams

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