Error -61046 When Compiling FPGA Code That Uses External Clock

Updated Jul 31, 2024

Reported In

Hardware

  • PXI Digital Reconfigurable I/O Module
  • Digital Reconfigurable I/O Device
  • Digitizer Adapter Module for FlexRIO

Software

  • LabVIEW FPGA Module
  • LabVIEW

Issue Details

  • I am attempting to compile my FPGA code. In the code, I am attempting to wire an external clock in my R-series or FlexRIO card. When they compile that code, they get Error -61046
  • I'm getting error -61046  in the NI 5761 - Low Speed Clock Select.lvproj example for NI FlexRIO. The error message is:
Error -61046: An error was detected in the communication between the host computer and the FPGA target. If you are using any external clocks, make sure they are connected and within the supported specifications. Also, verify that the rate of any external clocks match the specified clock rates. If you are generating your clocks internally, please contact National Instruments Technical Support.

This error occurs after the compilation of the FPGA code is completed and the code is trying to run. 

Solution

There are several reasons why this error may occur. Here are some troubleshooting steps.
  1. Make sure you have connected an external clock signal that is within the supported specifications.
  2. Make sure that the NI RIO Server is running by searching in Windows search for "Services" and setting the Startup Type as Automatic.
  3. If using FlexRIO, make sure the component-level Intellectual property (CLIP) chosen for the FlexRIO Adapter Module (FAM) is in the latest version. See instructions here.
  4. Check if you are able to run any built-in examples related to your hardware.
  5. The device name can be changed in MAX, causing compilation errors. Ensure the correct name is set in MAX.
If any of the previous steps do not work, some bad installation or corrupted software may be causing the issue. After uninstalling and reinstalling all the required software, modules, and drivers, the error should disappear.
The problem may be resolved by force reinstalling just the LabVIEW FPGA module.

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