How Can I Compensate for Different Group Delays with C Series Modules in LabVIEW FPGA?

Updated Sep 21, 2023

Issue Details

I am acquiring data from a NI 9215 and NI 9229 in LabVIEW FPGA. When synchronizing both of these modules and feeding in the same signal to both of them, I see a phase difference between them. I know that this is due to the delta-sigma ADC used on the NI 9229, but how can I compensate for this?

Solution

Group delay is a trait inherent to delta-sigma analog-to-digital converters (ADC). All of the NI C Series modules which use a delta-sigma ADC have a specification for group delay in the User Manual. Group delays are typically different for each ADC and can vary depending on the sampling rates. A method to compensate for these differences in group delays is to use a filter which delays a signal by a fractional number of samples.

Additional Information

Filters are used to add an artificial delay so that the total delays on both modules are equal. For example, the NI 9215 has a group delay of 0 samples because it uses a SAR ADC. On the other hand, the NI 9229 has a group delay of 40.0 samples due to its delta-sigma ADC. The number of samples in the group delay can be seen in the specification Input delay, in the specifications documents in the Related Links section below. By creating a filter with a delay length of 40.0 samples and applying it to the NI 9215 data, both modules will have the same delay and the data will be synchronized.

Other Support Options

Ask the NI Community

Collaborate with other users in our discussion forums

Search the NI Community for a solution

Request Support from an Engineer

A valid service agreement may be required, and support options vary by country.

Open a service request

Purchase or renew support services