FPGA Error: VI Defined FIFO Needs Read Method and Write Method

Issue Details

I have a VI defined FIFO in my application and I get an error message about having a read and write method in my FPGA VI. I have both read and write for the given

I am getting a Code Generation Error in my target scoped FIFO.  The error details say 

The VI Defined FIFO needs to have both a Read method and a Write method present on the block diagram.  Add a Read function on the block diagram for this FIFO.

or 

The VI Defined FIFO needs to have both a Read method and a Write method present on the block diagram.  Add a Write function on the block diagram for this FIFO.

Solution

Troubleshooting steps:

1. Make sure that you have Read and Write methods for the VI Defined FIFO in question.
2. Make sure that the FIFO reference going into the Read and Write methods is the same FIFO reference.
3. Make sure that the Read and Write methods for the FIFO are not located in a part of the code that will never execute.  Both methods need to be in a code path that is executable.
4. If the Read and Write Methods are in different FPGA VIs, make sure that both VIs are being called from the same top level FPGA VI.

Additional Information

If there is code in a portion of the VI that will never execute, it may be removed from the code during code generation to optimize for the amount of FPGA fabric used.  If that is the case, the Read or Write method may not actually end up in the optimized code and this error could result even though the method is visible on the FPGA VI.

If the Read and Write method is spread across two FPGA VIs, they need to be called from the same top level FPGA VI, since there can only be one top level FPGA VI.  Even if a FPGA VI that contains the Read method or the Write method and calls the other FPGA VI that contains the other method, the error will still appear.