How Many DMA Channels Does My Data Acquisition (DAQ) Device Have?

Issue Details

How many DMA channels does my Data Acquisition (DAQ) device have?

Solution

The number of DMA channels depends on the DAQ device.
 

• X Series

• Analog Input
• Analog Output
• Counter 0
• Counter 1
• Counter 2
• Counter 3
• Digital Waveform Generation (Digital Output)
• Digital Waveform Acquisition (Digital Input)

• M Series

• Analog Input
• Analog Output
• Counter 0
• Counter 1
• Digital Waveform Generation (Digital Output)
• Digital Waveform Acquisition (Digital Input)

• S Series

 

• E Series

Additional Information

DMA Overview
Today’s PCs are capable of programmed I/O and interrupt data transfers. DMA transfers increase the system throughput by using dedicated hardware to transfer data directly into system memory. Using this method, the processor is not burdened with moving data and is therefore free to engage in more complex processing tasks. To reap the benefits of DMA or interrupt transfers, your DAQ device must be capable of these transfer types. For example, while PCI and FireWire devices offer both DMA and interrupt-based transfers, PCMCIA and USB devices use interrupt-based transfers. Depending on how much processing is needed during data transfer, the rate at which the data is transferred from the DAQ device to PC memory may be affected by the data transfer mechanism.

With National Instruments driver software the DMA routines to transfer waveform data across the PC bus are optimized, thus providing the ability to transfer data as fast as possible. Each DMA controller channel contains a First-In First-Out memory storage (FIFO) and independent processes for filling and emptying the FIFO. This allows the buses involved in the transfer to operate independently for maximum performance.The DMA controller supports burst transfers to and from the FIFO. DMA controllers also act as a PCI Master device, and support scatter-gather operations to and from host memory. Each DMA controller supports packing and unpacking of data through the FIFOs to connect differently sized devices. The DMA system as a whole optimizes PCI bus utilization and automatically handles unaligned memory buffers, which can be used in linear or circular fashion.