Synchronizing PXIe Modules with TClk and an External Clock

Updated Jun 14, 2018

Reported In

Hardware

  • PXI Digital Waveform Instrument

Driver

  • NI-TClk

Issue Details

I have several digital waveform PXIe modules that I am synchronizing with NI-TClk that are reference clock synchronized to CLK100. I have an external 10 MHz clock signal that is connected to CLK IN on the chassis which will override the backplane CLK10 and PLL with CLK100. I notice that when I scope my modules' digital inputs/outputs against my 10 MHz signal, two undesirable things happen:
  • The waveform DIO's do┬ánot start with a leading edge of my 10 MHz clock / CLK10.
  • There is also no deterministic phase relationship between the waveform DIO's (in other words, the sample clock) and the 10 MHz clock / CLK10.
What can I do with NI-TClk to ensure that my waveform DIO's are also synchronized with my 10 MHz clock?

Solution

In this configuration, NI-TClk cannot guarantee any phase relationship between CLK10 and the PXIe module sample clocks. The sample clocks will phase align with CLK100 since that is what they are reference clock synchronized to, but there is no specific architecture in place to have the digital PXIe modules maintain phase with CLK10, too, while using NI-TClk.

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