Synchronizing DSA with SAR C Series Modules in FPGA

Issue Details

Solution

When using a combination of DSA and SAR modules, you can design your application for delta-sigma module timing using the Data Rate property nodes. With this approach you can add on-demand I/O modules without using Loop Timer VI. This method synchronizes all modules to a delta-sigma module clock.
 

Note the following details from the image displayed above:

1. Use a sequence structure to force the execution of the DSA module's data rate configuration, start and stop.
2. Use an I/O Property Node to set the Data Rate of the module.
   1. To change the item to which the Property Node points to: Right click the Property Node > Select Item > FPGA Target > Mod#, where # is the slot number in which your Delta Sigma module is.
3. You can drag and drop the FPGA I/O nodes from your project explorer. These I/O nodes can be expanded to hold more than just one input. Use all the terminals in the same I/O node to make sure they are all read at the same time in the FPGA.

Additional Information

• This method synchronizes all modules to a delta-sigma module clock.
• You need to take into account the DSA delay (ground delay) of your device. Review the following document for more information: How Can I Compensate for Different Group Delays with C Series Modules in LabVIEW FPGA?
• To check what type of ADC your C series analog input module has, check the user manual for your device.